A queue of write buffers is commonly employed in cache designs to minimize central processing unit (CPU) pipeline stalls by queuing external bus write requests. Coalescing write buffers which coalesce, combine or merge writes before transmission are particularly useful to reduce the bus bandwidth requirements. Such write buffers allow temporally local writes to a limited number of small areas to be merged together before the data is sent to the external bus.
U.S. Pat. No. 5,561,780 describes a method and apparatus for combining uncacheable write data into cache-line-sized write buffers. As described therein, the uncacheable write data may be a stream of graphics data to be sent to an external frame buffer, or a string move or string write operation. A write buffer is evicted or flushed if the buffer is full of data or if new data is received which cannot be placed in a write buffer. The second situation occurs when all write buffers are allocated (i.e., already storing some data to be transmitted) and the new data cannot be merged into one of the allocated write buffers, because of an address mismatch. Such a situation is highly undesirable since it causes a CPU pipeline stall. Although data stored in partially filled write buffers may be evicted under certain circumstances including the occurrence of a synchronization fence, such provisions fail to guarantee the avoidance of the second situation described above.